This invention relates to a semiconductor device having both a high breakdown voltage transistor and a Schottky barrier diode.
It is well known in the art that in a high speed logic circuit or a high frequency and large signal amplifier the saturation phenomenon of a transistor used in such a device is a factor for deteriorating the operation speed or frequency property of the device.
As a prior art method of preventing such saturation phenomenon of transistor, there is one in which a Schottky barrier diode is provided between the base and collector of a transistor. Meanwhile, in order to obtain a high breakdown voltage transistor it is necessary to set a large thickness of an epitaxial layer and a high resistivity thereof.
FIG. 1 shows an example of IC (integrated circuit) where a high breakdown voltage transistor, for instance a planar type bipolar transistor, and a Schottky barrier diode are assembled. In FIG. 1, on a P-type silicon substrate 1 is formed an N.sup.+ -type buried layer 2, on which is formed an N.sup.- -type epitaxial layer 3. When this epitaxial layer 3 has a thickness t.sub.VG of 11 to 13.mu. and a resistivity .rho..sub.VG of 2 to 3 .OMEGA..cm, the breakdown voltage V.sub.CED between the collector and emitter of the transistor is 30 V or above. In the N.sup.- -type epitaxial layer 3, P-type regions 5 and 6 serving as a base region of the transistor and a guard ring of the Schottky barrier diode are formed. A Schottky barrier diode 7 is formed in a surface portion of the N.sup.- -type epitaxial layer 3 surrounded by the P-type regions 5 and 6. The Schottky barrier diode 7 is formed by an aluminum-silicon contact, a platinum-silicon contact etc. Reference numeral 4 designates a silicon oxide film, 8 an electrode for the base of the transistor and the Schottky barrier diode, 9 the emitter electrode of the transistor, 10 the collector electrode of the transistor, 11 the P.sup.+ -type layer as an isolation region, and 12 an N.sup.+ -type layer as the emitter of the transistor.
With the semiconductor device of the above construction in which the N.sup.- -type epitaxial layer has a large thickness t.sub.VG and a high resistivity .rho..sub.VG, the resistance of the N.sup.- -type epitaxial layer 3 that lies between the Schottky barrier diode 7 and base region of the transistor (P-type layer 5) on one hand and the N.sup.+ -type burried layer 2 on the other hand is high. This resistance corresponds to the resistance of the resistance element connected in series with the Schottky barrier diode 7. Therefore, the CR time constant that is determined by the contact capacitance of the Schottky barrier diode, the base-emitter junction capacitance and the resistance of the aforementioned N.sup.- -type epitaxial layer 3 is large, and consequently the storage time is long. This means that it is impossible to obtain sufficient function of the clamping Schottky barrier diode assembled in the device for the purpose of permitting high speed operation of the device.